Monday, November 5th, 2001
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7:01 pm - Long time...
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Well, it seems like it has been a while since I have posted on this site. Here is the current status. I'm sick. No, not mentally sick as many of you believe but coughing I feel like crap sick. Just thought you should know...
On the project front. We have been working for the past two weeks to try and get a VHDL package working so we can throw all my hard work out the window and just use VHDL. It seems that the tools we are using are choking and don't want to route the wires for us. It then crashes and burns in a segmentation fault. Wow, thanks for the graceful exit with no knowledge of what happened. Currently others are emailing tech support and I am still searching for answers anywhere on the web. So if anyone knows anything about Alliance and the tools such as 'rage' and 'scr' please let me know. Other than that I think i will go back to bed and sleep a bit more. Only to wake up and start the whole crappy cycle over again. It sucks to be sick.
Later,
Michael
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Monday, October 15th, 2001
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6:40 pm - Finished...kinda.
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I said I would do it and gosh darn-it I did. ;-)
I have now laid out all 896 transistors in the decoder matrix as well as wiring for the ground and input to the transistors. Now all that is left to do is wire up the reference voltage. Then complete the pull-up transistor network and the word line drivers which I can hopefully steal from my previous work on the memory. Sounds like this is coming along nicely. I am now thinking of how to test this and how editing this piece wise file could become daunting in itself. I am thinking of writing a simple program to do this for me. I have already done one for my memory, but it was simplistic as testing a one bit memory slice is rather simplistic. I'll continue to post updates here as time goes on.
current mood: accomplished
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2:37 pm - Almost...
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So it's been what about 2 weeks since I've said anything about the progress?!? Well, life has been hectic. The past two weeks have been filled with projects and mid-terms galore which made me put this work on the back burner a bit. I mean, you have to put other things first sometimes. But I won't go into detail as this is not the place for it. ;-) So, by the end of today I project the layout of almost the whole decoder will be finished. All that will be left is to layout the pull-up transistors followed by the word line drivers. There are 128 words in this design, and the pull transistors are limited. I just have to follow correct design style for this design. Well, I'm going to finish this layout. I'll keep you updated.
current mood:  depressed
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Monday, October 1st, 2001
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6:35 pm - Same old, Same old
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So here I sit in the lab at 6:30 working on the decoder layout. It was going along smoothly till I somehow missed a bit line causing me to now go back and correct around 112 transistors that have been laid down in the wrong position. Oh well!
So after I fix my mistake I will be 2/7's of the way finished with this decoder. Lots of work to do since it contains approximately 896 transistors. That's it for today.
current mood: hungry
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Friday, September 28th, 2001
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3:37 pm - Decoder Design
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We have found a decoder design that will be good in both area and efficiency. It was invented by Lyon and Schediwy and thus is called the Lyon-Schediwy Decoder. The idea is that in a decoder only one input is high at a time, and thus it is possible to share the pull up transistors across the design. The other half of the design is a series of NOR gates that will pull down the decoder line fast. At first it would seem that the pull up transistors would be a bad idea since PMOS transistors in series would be very slow to pull up. But in fact due to a tree structure and a smart transistor sizing approach it is the same throughout the tree. This was analyzed by the authors of the book "Logical Effort". Southerland, Sproull and Harris. For more information on this design you should check into it. I am currently laying out this design and should be nice and clean. Much better than the and tree approach. (using NANDS and NORS) That's it for now...more to come later.
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Monday, September 17th, 2001
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3:33 am - Update finished...
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After a couple weeks of having the update ready but not uploading it I have now uploaded it. This includes many different design updates. This update includes frames to allow easy navigation including access to this online journal. This update includes the achievements posted today with new screen shots of the two current hspice runs through awaves.
The first run is with the sense enable signal going high right after the precharge along with the word line. I noticed with this configuration the output had a somewhat major glitch of around -.2 volts from Vdd. Refer to the images to see what I'm talking about.
A way I noticed to solve this was wait for the values on the bit lines to settle after pre-charge. By delaying the time to sense enable by 500 pico seconds it almost entirely removed the glitch. This can be viewed on the second awaves picture. This doesn't effect the timing much yet of the circuit since the sense amp yanks the output down very fast.
It should be noted that the clock cycle, which in this case is shown by the rise and fall of the word line, could be shortened even more to allow for faster clock. Currently the 2 nano second clock cycle puts the memory running at around 500 MHz. For now I'll start on the address decoder and as always keep you informed and I'm sure on the edge of your seat with anticipation.
And what's up with my current music...geez. Oh well, seems fitting somehow. hehe
current mood: accomplished
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Sunday, September 16th, 2001
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12:30 pm - It works!
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After leaving the design alone and just pondering the problem I came in about an hour ago and found the problem. A single piece of metal was not connecting a transistor and therefore not fully charging the bit line. I produced a small test and it appears to be working. I will now start to design the address decoder. The website should be updated sometime tonight to reflect the current state of everything.
Till the next time I post...Michael
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Wednesday, September 12th, 2001
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4:31 pm - State of the world...
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While this does not pertain to my project I will say not much was accomplished by myself yesterday as the events that unfolded are too much for one to handle sometimes. But life continues in what appears to be this chaotic world. And so goes the project, I will work on it more this evening. Thank you...
current mood:  distressed
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Monday, September 10th, 2001
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7:27 pm - Well that's...not it!
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Well, it's time to wrap this up for now. What I haven't accomplished this afternoon/evening is getting the whole SRAM 1 bit bank to work correctly yet. I have a feeling it has to do with my sense amp as I said before, so I will check on this the next time. Still on the to-do list is get the 7 bit address decoder laid out and working and more simulations. I would rather be sure I'm right than be wrong.
Time for a bit of food.
current mood:  contemplative
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5:40 pm - Welcome!
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Today I am am making the first entry into this journal. As a matter of formality let me explain why I have this and what you can expect out of it. It so happens that I am working on a research project at the University of Georgia. Which by my name you might or might not know deals with VLSI. For those who don't know VLSI stands for Very Large Systems Integrated. In regular language I am designing the layout of transistors that go into making integrated circuits. Those wondrous chips that are now everywhere.
Now I'm not going to explain much about the project as you can find all that information here. What I will be doing is using this journal to keep track of advances or the lack of advances in my tasks. This should be an interesting project and I'm looking forward to it.
Over the summer I worked on this project as well and it still continues. Currently some things have been accomplished. I have an SRAM memory cell layout that is functioning. I also have a pre-charge portion for the bit lines. I have drivers for the bit lines and I also have a sense amp.
Over the summer I had tested these together and they appeared to work but now as I am simulating everything again things aren't working the way I thought they have. So I am spending more time debugging the current situation than working on the next portion of the project I need to do. And that is design a 7 bit decoder for memory addressing.
I suspect my problem is in the pre-charge or sense amp area. I will make this work! If it takes me all night it will bend to my will!
current mood: working
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